This invention relates to ring-type voltage-controlled oscillators (VCO""s), and more particularly to ring-type VCO""s with reduced phase noise.
Phase-locked loops (PLL""s) are analog building blocks used extensively in many analog and digital communication systems. Some applications of PLL""s are frequency synthesizers, analog and digital modulators and demodulators, and clock recovery circuits, to name a few. A PLL, a typical design for which is shown in FIG. 1, includes a VCO, which is a circuit that produces an ac output signal whose frequency is proportional to an input control voltage. Random fluctuations in the output phase of the VCO, in terms of phase noise, are undesirable in most applications. The phase noise in a VCO output can result in cross-talk in a wireless communications system, and it can also result in increased bit error rates in a wired communications system. It is particularly difficult to meet the stringent phase noise requirements for communicating at high frequencies and high data rates.
VCO""s fabricated with GaAs or bipolar technology, and using high-quality discrete components, have been widely used for many years to obtain high operation frequencies with acceptable noise performance. Recently, as switching speeds of complementary metal-oxide (CMOS) processes have increased sufficiently, the design of VCO""s in CMOS is becoming attractive, because manufacturing is less expensive and designing the VCO in CMOS allows greater integration with other CMOS digital circuitry. CMOS VCO""s of LC-tank type have recently been studied, but have barriers. For example, implementing the high-quality inductor needed for a LC-tank VCO in a standard CMOS process consumes significant silicon area. More importantly, LC-tank VCO""s in CMOS generally have narrow tuning ranges, and so performance is sensitive to process variations.
Another type of VCO is known as a ring-type VCO. A ring-type VCO is realized by placing a number of inverting amplifiers in a feedback loop. Each inverting amplifier adds delay to the feedback loop, and the amount of delay added by the inverters dictates the frequency at which the ring-type VCO operates. The greater the delay, the lower the frequency. Ring-type VCO""s do not use inductors and have a greater tuning range, and so do not have the processing limitations that LC-tank VCO""s have. However, given the lack of high-quality resonant elements in a ring-type VCO, designing a CMOS ring-type VCO with acceptable phase noise poses a challenge. In addition, there is a direct trade-off between power consumption and VCO phase noise performance. It is desirable to minimize the phase noise for a given power consumption budget.
Recently, CMOS ring oscillators have been proposed and studied. For example, CMOS ring oscillators that utilize a memory element in an inverter delay stage have been proposed. See Thamsirianunt et al., xe2x80x9cCMOS VCO""s for PLL Frequency Synthesis in GHz Digital Mobile Radio Communications,xe2x80x9d in IEEE Jnl. Of Solid-State Circuits, Vol. 32, No. 10, October 1997, pp. 1511-24, especially FIG. 6 on p. 1515; Park et al. xe2x80x9cA Low-Noise, 900-MHz VCO in 0.6-xcexcm CMOS,xe2x80x9d in IEEE Jnl. Of Solid-State Circuits, Vol. 34, No. 5, May 1999, 586-91, especially FIGS. 2 and 4(a) on pp. 587 and 588. In these CMOS ring VCO""s utilizing a delay stage with a memory element, the outputs of the inverter delay stages are generally in the form of a square wave. As such, the output of each inverter delay stages include periods of switching (from LOW to HIGH, and then from HIGH to LOW), and periods during which the inverter stages are either LOW or HIGH. In the prior CMOS ring-type oscillator designs shown in Thamsirianunt et al. and Park et al., the delay of delay elements is dictated by tuning the strength of the memory element based on the control voltage. Because the strength of the memory element also dictates the speed at which the output switches, tuning the strength of the memory element to achieve a longer delay (and hence a slower frequency) has the effect of increasing the switching time.
In addition, differential control of a VCO typically involves the use of two control voltage terminalsxe2x80x94VCNTRL+ and VCNTRLxe2x88x92. The frequency of oscillation is determined by the voltage difference (differential mode voltage) between the two control voltage terminals and is not affected by common-mode voltage of the two control voltage terminals. Differential control has been used in VCO design, and in fact has been used in one proposed ring-type VCO design. See Razavi, xe2x80x9cA Study of Phase Noise in CMOS Oscillators,xe2x80x9d in IEEE Jnl. of Solid-State Circuits, Vol. 31, No. 3, March 1996, pp. 331-43, especially p. 335 and FIG. 10. In the ring-type VCO proposed by Razavi, the proposed fully differential control uses a differential pair. This design may not be applicable for high-speed switching topologies, and because of the additional voltage drop across the differential pair, the design is not suited for low voltage operation.
In one aspect, the invention is a delay stage used in a ring-type VCO. The delay stage has an inverter, a memory element, and tuning circuitry. The inverter receives a signal from another delay stage and provides an output also to another delay stage. The memory element is coupled to the output of the inverter to delay the time before the output begins to switch states in response to the inverter""s input switching states. The amount of this delay depends on the relative strengths of the inverter and the memory element. The tuning circuitry is coupled with the inverter to alter the inverter""s strength, thereby altering the delay time, while the strength of the memory element is held substantially constant. Because the design and strength of the memory element substantially dictates the switching speed, the invention allows increased switching speed to be maintained regardless of the tuned delay. And because phase noise is generated during the switching time, maintaining the increased switching speed serves to reduce phase noise.
In another aspect, the invention is a ring-type VCO utilizing an even number of delay stages that each have a memory element, wherein each of the delay stages has differential outputs. As such, the VCO provides useful quadrature outputs. In addition, and in another aspect, the invention incorporates differential control, which reduces substrate and power-supply-generated phase noise.
The invention affords one or more of the following advantages. Phase noise is reduced for a design that can be easily implemented in low-power-consuming processes like CMOS. The invention makes less-expensive VCO designs more easily realizable.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.